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On-Chip Networks

On-Chip Networks

Natalie Enright, Li-Shiuan Peh

Springer
Collection: Synthesis Lectures on Computer Architecture
Publication date : 2022-11-10

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With the ability to integrate a large number of cores on a single chip, research into on-chip networks to facilitate communication becomes increasingly important. On-chip networks seek to provide a scalable and high-bandwidth communication substrate for multi-core and many-core architectures. High bandwidth and low latency within the on-chip network must be achieved while fitting within tight area and power budgets. In this lecture, we examine various fundamental aspects of on-chip network design and provide the reader with an overview of the current state-of-the-art research in this field. Table of Contents: Introduction / Interface with System Architecture / Topology / Routing / Flow Control / Router Microarchitecture / Conclusions

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About the book

Author

Natalie Enright , Li-shiuan Peh

Imprint

Springer

Collection

Synthesis Lectures on Computer Architecture

Publication date

2022-11-10

Pages

141 pages

Print ISBN

9783031000522

Language

English

Ebook informations

EAN PDF

9783031017254

Price

£79.99

Copy count 1

Print count 14

File size 2171 Ko

Informations accessibility

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About author(s)

Natalie Enright

Li-shiuan Peh

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