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Timing Performance of Nanometer Digital Circuits Under Process Variations

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Timing Performance of Nanometer Digital Circuits Under Process Variations

Victor Champac, Jose Garcia Gervacio

Springer
Collection: Frontiers in Electronic Testing
Publication date : 2018-04-18

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This book discusses the digital design of integrated circuits under process variations, with a focus on design-time solutions. The authors describe a step-by-step methodology, going from logic gates to logic paths to the circuit level. Topics are presented in comprehensively, without overwhelming use of analytical formulations. Emphasis is placed on providing digital designers with understanding of the sources of process variations, their impact on circuit performance and tools for improving their designs to comply with product specifications. Various circuit-level “design hints” are highlighted, so that readers can use then to improve their designs. A special treatment is devoted to unique design issues and the impact of process variations on the performance of FinFET based circuits. This book enables readers to make optimal decisions at design time, toward more efficient circuits, with better yield and higher reliability.

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About the book

Author

Victor Champac , Jose Garcia Gervacio

Imprint

Springer

Collection

Frontiers in Electronic Testing

Publication date

2018-04-18

Pages

185 pages

Print ISBN

9783319754642

Language

English

Ebook informations

EAN PDF

9783319754659

Price

£109.50

Copy count 1

Print count 18

File size 13793 Ko

Informations accessibility

EAN EPUB

9783319754659

Price

£109.50

Copy count 1

Print count 18

File size 4690 Ko

Informations accessibility

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About author(s)

Victor Champac

Jose Garcia Gervacio

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