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There is an ever-increasing trend towards putting entire systems on a single chip. This means that analog circuits will have to coexist on the same substrate along with massive digital systems. Since technologies are optimized with these digital systems in mind, designers will have to make do with standard CMOS processes in the years to come. Filters form important blocks in applications ranging from computer disc-drive chips to radio transceivers. This work addresses the theoretical and practical problems encountered in the design of robust, programmable continuous-time filters with very high bandwidths, implemented in low-cost digital CMOS technologies. A high performance programmable filter architecture, called 'constant-capacitance scaling', is discussed in detail. This technique has the potential for very high-speed operation, and ensures that frequency response shape, noise and dynamic range are maintained as bandwidth is programmed.
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