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CMOS Current Amplifiers; Speed versus Nonlinearity is intended as a current-amplifier cookbook containing an extensive review of different current amplifier topologies realisable with modern CMOS integration technologies. The seldom-discussed issue of high-frequency distortion performance is derived for all reviewed amplifier topologies using as simple and intuitive mathematical methods as possible. The topologies discussed are also useful as building blocks for high-performance voltage-mode amplifiers. So the reader can apply the discussed techniques to both voltage- and current-mode analogue integrated circuit design.For the most popular open-loop current-mode amplifier, the second-generation current-conveyor (CCII), a macro model is derived that, unlike other reported macromodels, can accurately predict the common-mode behaviour in differential applications. Similarly, this model is used to describe the nonidealities of several other current-mode amplifiers. With modern low-voltage CMOS-technologies, the current-mode operational amplifier and the high-gain current-conveyor (CCIIINFINITY perform better than various open-loop current-amplifiers. Similarly, unlike with conventional voltage-mode operational amplifiers, the large-signal settling behaviour of these two amplifier types does not degrade as CMOS-processes are scaled down.This book contains application examples with experimental results in three different fields: instrumentation amplifiers, continuous-time analogue filters and logarithmic amplifiers. The instrumentation amplifier example shows that using unmatched off-the-self components very high CMRR can be reached even at relatively high frequencies. As a filter application, two 1 MHz 3rd-order low-pass continuous-time filters are realised with a 1.2 mum CMOS-process. These filters use a differential CCIIINFINITY with linearised, dynamically biased output stages resulting in outstanding performance when compared to most OTA-C filter realisations reported.As an application example of nonlinear circuits, two logarithmic amplifier chips are designed and fabricated. The first circuit, implemented with a 1.2 &mgr;m BiCMOS-process, uses again a CCII8 and a pn-junction as a logarithmic feedback element. With a CCII8 the constant gain-bandwidth product, typical of voltage-mode operational amplifiers, is avoided resulting in a constant 1 MHz bandwidth within a 60 dB signal amplitude range. The second current-mode logarithmic amplifier, realised in a 1.2 &mgr;m CMOS-process, is based on piece-wise linear approximation of the logarithmic function. In this logarithmic amplifier, using limiting current amplifiers instead of limiting voltage amplifiers results in exceptionally low temperature dependency of the logarithmic output signal. Additionally, along with this logarithmic amplifier a new current peak detector is developed.
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