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High Performance Multi-Channel High-Speed I/O Circuits

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High Performance Multi-Channel High-Speed I/O Circuits

Ramesh Harjani, Taehyoun Oh

Springer
Collection: Analog Circuits and Signal Processing
Publication date : 2013-09-07

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This book describes design techniques that can be used to mitigate crosstalk in high-speed I/O circuits. The focus of the book is in developing compact and low power integrated circuits for crosstalk cancellation, inter-symbol interference (ISI) mitigation and improved bit error rates (BER) at higher speeds. This book is one of the first to discuss in detail the problem of crosstalk and ISI mitigation encountered as data rates have continued beyond 10Gb/s. Readers will learn to avoid the data performance cliff, with circuits and design techniques described for novel, low power crosstalk cancellation methods that are easily combined with current ISI mitigation architectures.

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About the book

Author

Ramesh Harjani , Taehyoun Oh

Imprint

Springer

Collection

Analog Circuits and Signal Processing

Publication date

2013-09-07

Pages

89 pages

Print ISBN

9781461449621

Language

English

Ebook informations

EAN EPUB

9781461449638

Price

£89.50

Copy count 0

Print count 8

File size 3881 Ko

Informations accessibility

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About author(s)

Ramesh Harjani

Taehyoun Oh

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